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How to use on_after_reset method in localstack
Best Python code snippet using localstack_python
dap_cortex-m0plus.py
Source:dap_cortex-m0plus.py 
...97 g_is_running = state 98 if not g_is_running:99 cache_onStop()100 return g_is_running101def on_after_reset(): 102 if not settings.getBool("arm.use_vtor", False):103 return104 vtor_name = settings.getString("arm.vtor_adr", "0")105 vtor = -1106 try:107 vtor = int(vtor_name,0)108 except:109 try:110 vtor=deb.GetSymbolAddress(vtor_name)111 except:112 log.error("Debug: failed to compute location of VTOR")113 return114 load_vtor(vtor) 115 pass116def load_vtor(adr):117 try:118 dev.WriteReg64(arm.PC,dev.Read32(adr + 4))119 dev.WriteReg64(arm.SP,dev.Read32(adr))120 except:121 log.error("Debug: failed to set PC and SP to vtor[0] and vtor[4], with vtor=0x%08x" % adr)122def on_program_done():123 on_after_reset()124def _reset_target(): 125 reset_and_halt()126def _end_debug_session(): 127 run_target()128 dev.Disconnect()129def _hold_in_reset(): 130 global target_was_reset131 global has_reset132 if not has_reset:133 alt_hold_in_reset()134 return135 log.info("Prog: Hold in reset")136 try:137 dev.SetInterface(dev.SWD)138 except:139 dev.Connect(True, 100000)140 dev.Pins(0, dev.RESET, 1000)141 target_was_reset = True142 # do not dev.Disconnect() . The debugger needs to stay connected to actively keep the reset line low.143def alt_hold_in_reset(): 144 # Alternative if RESET pin is not connected to debugger145 log.info("Prog: Hold in reset , no reset line")146 dev.Connect(True, 100000)147 reset_and_halt()148def _release_from_reset():149 global target_was_reset,reset_delay150 global has_reset151 if target_was_reset:152 return153 if not has_reset:154 log.info("Prog: Release from reset (soft reset)")155 dev.Connect(True, 100000)156 reset_and_halt()157 run_target()158 return159 log.info("Prog: Release from reset (float reset line)")160 # toggle reset line161 try:162 dev.SetInterface(dev.SWD)163 except:164 dev.Connect(True, 100000)165 dev.Pins(0, dev.RESET, 1000)166 dev.Delay(reset_delay)167 dev.Pins(dev.RESET, dev.RESET, 1000) # now float reset back168 dev.Delay(reset_delay)169 target_was_reset = True170 dev.Disconnect() #we are done with the part171def alt_release_from_reset():172 log.info("Prog: Release from reset, no reset line")173 dev.Connect(True, 100000)174 dev.Write32(dev.AIRCR, 0x05fa0004) # VECTKEY | SYSRESETREQ175def set_sw_bp_gen(address, erase_size, instruction, flags): #mplab176 global erase_as_needed177 log.debug("Debug: set/reset bp at address 0x%0x, store instructions 0x%0x, flags = 0x%0x" % (address, instruction, flags))178 if address >= 0x20000000:179 erase_size = 4 180 else:181 clear_and_report_flash_error()182 erase_page_start = address & ~(erase_size-1)183 address_in_erase_page = address & (erase_size-1)184 data = bytearray(erase_size)185 cache_invalidateInstrCache()186 dev.Read(erase_page_start, data, 0, erase_size)187 return_value = data[address_in_erase_page] | (data[address_in_erase_page+1] << 8)188 # Insert software breakpoint instruction in the data189 data[address_in_erase_page] = instruction & 0xFF190 data[address_in_erase_page+1] = (instruction >> 8) & 0xFF191 if erase_size == 4:192 dev.Write(erase_page_start, data, 0, erase_size)193 else:194 erase_as_needed = True195 prog_write("Pgm", erase_page_start, erase_size, data)196 return return_value197# device specific functions198dsu_statusa = 0x41002101199dsu_ctrl = 0x41002100200 201class nvm:202 page_size = 64203 erase_size = 256204 aux_size = 256205 cmdReg = 0x41004000206 cfgReg = 0x41004004207 stsReg = 0x41004018208 intReg = 0x41004014209 adrReg = 0x4100401c210 AUX_ERASE = 0xA505211 ROW_ERASE = 0xA502212 RWW_ERASE = 0xA51A213 RWW_WRITE = 0xA51C214 erase_time = 100215 UROW = 0x00804000216 RWW = 0x00400000217 SSB = 0xA545218def cache_invalidate():219 nvm_cmd(0xA546,20)220def cache_onDebugStart():221 cache_invalidate()222def cache_onStop():223 cache_invalidate()224def cache_onRun():225 pass 226def cache_onDataRead(adr,size):227 pass #done in onStop228def cache_onDataWrite(adr,size):229 pass #done in onStop230def cache_invalidateInstrCache():231 pass #done in onStop232def is_nvm_ready():233 intFlag = dev.Read8(nvm.intReg)234 isReady = 0 != (intFlag & 1)235 isError = 0 != (intFlag & 2)236 if not isError: # if no ERROR bit is set237 return isReady238 status = dev.Read16(nvm.stsReg)239 log.error("NVMCtrl error bits set! (STATUS = 0x%X, INTFLAG = 0x%X)" % (status, intFlag))240 dev.Write16(nvm.stsReg, status | 0x001E) # clear error bits and load bit by setting 1241 dev.Write8(nvm.intReg, intFlag | 2) # clear error bit by setting 1242 raise Exception("NVMctrl reports an error")243def clear_and_report_flash_error():244 try:245 is_nvm_ready()246 except:247 log.error("NVM controller is in an error state while setting a swbp. Clearing the error")248# global variable keeps previous value of flash cfg register while programming249prevCfgReg = 0x0250def cfg_nvmctrl():251 global prevCfgReg252 prevCfgReg = dev.Read32(nvm.cfgReg)253 newCfgReg = (prevCfgReg & 0xFFFFFF61) | 0x1e # 15 wait states and clear MANW254 if newCfgReg != prevCfgReg:255 dev.Write32(nvm.cfgReg, newCfgReg)256def restore_nvmctrl():257 #log.debug("reset_cfg_word: prevCfgReg = %x" % prevCfgReg)258 dev.Write32(nvm.cfgReg, prevCfgReg)259def erase_row(addr,cmd):260 dev.Write32(nvm.adrReg,addr/2)261 nvm_cmd (cmd, 20)262def _begin_programming_operation():263 global erase_as_needed,has_reset264 erase_as_needed = True265 reset_extension()266 dev.Connect(comm_iface, comm_speed)267 if has_reset:268 statusa = dev.Read8(dsu_statusa) # verify CRSTEXT is set269 if 0 == (statusa & 2): #STATUSA.CRSTEXT270 log.error("Device could not enter reset extension, check cap on RST line")271 raise Exception("Reset error.")272 else:273 log.info("Device entered reset extension")274 try:275 reset_and_halt() # clear CRSTEXT276 except:277 pass278def reset_extension():279 global reset_delay # additional delay for reset line if needed280 global has_reset281 if not has_reset:282 return283 delay=1000 # time to wait for analog RESET/SWCLK pins to become digitally high/low284 try:285 dev.SetInterface(dev.SWD)286 except:287 dev.Connect(comm_iface, comm_speed)288 dev.Pins(0,dev.RESET,delay) # 1 msec with reset high 289 if reset_delay > 0:290 dev.Delay(reset_delay)291 dev.Pins(dev.RESET,dev.RESET,delay) # 1 msec with floating reset 292 if reset_delay > 0:293 dev.Delay(reset_delay)294 dev.Pins(0,dev.RESET | dev.SWCLK,delay); # 1 msec with reset and clock low 295 if reset_delay > 0:296 dev.Delay(reset_delay)297 dev.Pins(dev.RESET,dev.RESET,delay); # now float reset back298 if reset_delay > 0:299 dev.Delay(reset_delay)300 dev.Delay(10000)301def _read_device_id():302 return dev.Read32(0x41002118) # DSU-DID register303set_security_bit = False 304def _erase():305 global erase_as_needed306 global set_security_bit307 set_security_bit = False308 dsu_ce = 0x10309 dev.Write8(dsu_ctrl, dsu_ce) # 0x41002100,0x10310 n = 0311 while n < nvm.erase_time:312 statusa=dev.Read8(dsu_statusa) # 0x41002101313 if statusa & 1: #statusa_done314 if statusa & 0x1c:315 log.error("DSU.STATUSA indicates an error %x" % statusa)316 raise Exception("Erase error")317 break318 dev.Delay(100000)319 n=n+1320 erase_as_needed = False # tell prog_write not to erase rows prior to write321 reset_extension() # reset_extension is required after a chip erase when chip(e.g. SAME54) was secured322 dev.Connect(comm_iface, comm_speed)323 reset_and_halt()324 if settings.getBool("x.erase.clearprot", True):325 restoreBOOTPROTandNVMCTRLREGIONLOCKS()326def reset_and_halt():327 halt_target()328 dev.Write32(arm.DEMCR, 0x01000001) # TRCENA | VC_CORERESET329 dev.Write32(arm.AIRCR, 0x05fa0004) # VECTKEY | SYSRESETREQ330 n = 0331 retries = 10332 seenReset = False333 while n<retries:334 dhcsr = dev.Read32(arm.DHCSR)335 #print_dhcsr_v("arm.DHCSR",dhcsr)336 if (dhcsr & 0x02000000): # wait for S_RESET_ST337 seenReset=True338 dev.Write32(arm.DHCSR, 0xa05f0003) # DBGKEY|C_HALT|C_DEBUGEN339 dev.Write8(dsu_statusa, 2) # release the cpu 0x41002101,0x2 STATUSA.CRSTEXT340 dhcsr = print_dhcsr("Cleared CRSTEXT")341 hasHalted = 0 != (dhcsr & 0x20000) # S_HALT342 if seenReset:343 if hasHalted: # wait for S_HALT344 break345 dev.Delay(100000)346 n=n+1347 dev.Write32(arm.DEMCR, 0x01000000) # TRCENA348 if n==retries:349 raise Exception("The device did not come out of reset")350def nvm_cmd(command, t):351 dev.Write16(nvm.cmdReg, command)352 wait_nvm_ready(t)353def wait_nvm_ready(t):354 while t > 0 :355 if is_nvm_ready():356 return357 dev.Delay(1000)358 t = t - 1359 if t == 0:360 raise Exception("The NVM controller operation did not finish")361def write_row(adr, ofs, data,len):362 dev.Write(adr, data, ofs , len)363 wait_nvm_ready(10)364def _prog_write(type_of_mem, address, length, data): 365 global erase_as_needed366 if address == 0x41004000:367 if length < 1:368 log.error("Empty security bit payload")369 return370 global set_security_bit371 set_security_bit = data[0] != 0372 if set_security_bit:373 log.info("Will set the security bit")374 return375 if str(type_of_mem) != "Pgm" and str(type_of_mem) != "Cfg" and str(type_of_mem) != "RWW":376 dev.Write(address, data, 0, length)377 return378 if address == nvm.UROW: # user page / fuses / configuration bits379 _flash_write_rng(address,length,data,nvm.AUX_ERASE)380 reset_and_halt()381 else:382 erase_cmd = nvm.RWW_ERASE if str(type_of_mem) == "RWW" else nvm.ROW_ERASE383 _flash_write_rng(address,length,data,erase_cmd if erase_as_needed else 0)384 erase_as_needed = True385def _flash_write_rng(address, length, data, erase_cmd):386 cfg_nvmctrl()387 written = 0388 # a flash row has 'erase_size' bytes389 while written < length:390 if erase_cmd != 0:391 erase_row(address, erase_cmd)392 if erase_cmd == nvm.AUX_ERASE:393 dev.Read32(address) # fix for MPLABX-4768. For the particular project provided in the Jira ticket, MPLAB need to to a read before write, otherwise the PC will be 0394 write_row(address,written,data, min(length - written, nvm.erase_size))395 #dev.Read(address,data1,0,nvm.erase_size)396 written += nvm.erase_size397 address += nvm.erase_size398 restore_nvmctrl()399def _flash_write(address, length, data, doerase): # for swbps400 _flash_write_rng(address, length, data, nvm.ROW_ERASE)401def _prog_read(type_of_mem, address, length, data): 402 dev.Read(address,data,0,length)403def _end_of_operations():404 global erase_as_needed,set_security_bit405 erase_as_needed = True406 if set_security_bit:407 log.info("Setting security bit")408 try:409 nvm_cmd(nvm.SSB,20)410 except:411 pass412 set_security_bit = False413 #reset_and_halt()414 dev.Disconnect()415def set_sw_bp(address, instruction, flags):#mplab416 return set_sw_bp_gen(address,nvm.erase_size,instruction,flags)417def restoreBOOTPROTandNVMCTRLREGIONLOCKS():418 b=bytearray(nvm.page_size)419 dev.Read(nvm.UROW, b, 0, nvm.page_size)420 if "M0" in architecture:421 if "JH" in device and "PIC32CM" in device:422 b[0] = b[0] | 0x0F # clear BOOTPROT423 else:424 b[0] = b[0] | 0x07 # clear BOOTPROT425 b[6] = 0xFF # clear NVMCTRL_REGION_LOCKS426 b[7] = 0xFF # clear NVMCTRL_REGION_LOCKS427 elif "M4" in architecture:428 b[3] = b[3] | 0x3C # clear BOOTPROT429 b[8] = 0xFF # clear NVMCTRL_REGION_LOCKS430 b[9] = 0xFF # clear NVMCTRL_REGION_LOCKS431 b[10] = 0xFF # clear NVMCTRL_REGION_LOCKS432 b[11] = 0xFF # clear NVMCTRL_REGION_LOCKS433 prog_write("Cfg", nvm.UROW, nvm.page_size, b)434def begin_communication_session(): #mplab435 log.info("Begin comm session")436 _begin_communication_session()437def end_communication_session(): #mplab438 log.info("End comm session")439 _end_communication_session()440def begin_programming_operation(): #mplab441 log.info("Begin operations")442 _begin_programming_operation()443def read_device_id():#mplab444 log.info("Read device ID")445 return _read_device_id()446def erase(): #mplab447 log.info("Erase")448 _erase()449def prog_write(type_of_mem, address, length, data): #mplab450 log.info("Writing %08x bytes to address 0x%08x of %s memory" % (length, address, type_of_mem))451 _prog_write(type_of_mem, address, length, data)452def prog_read(type_of_mem, address, length, data): #mplab453 log.info("Reading %08x bytes from address 0x%08x of %s memory" % (length, address, type_of_mem))454 _prog_read(type_of_mem, address, length, data)455def end_of_operations():#mplab456 log.info("End of operations")457 _end_of_operations()458def begin_debug_session(): #mplab459 log.info("Debug: Init debug session")460 _begin_debug_session()461def debug_read(mt, start, length, data): #mplab462 log.info("Debug: Reading %08x bytes at start address 0x%08x (%s)" % (length, start, mt))463 _debug_read(mt, start, length, data)464def debug_write(mt, start, length, data): #mplab465 log.info("Debug: Writing %08x bytes at start address 0x%08x (%s)" % (length, start, mt))466 _debug_write(mt, start, length, data)467def set_pc(pc): #mplab468 log.info("Debug: set pc to 0x%08x" % pc)469 _set_pc(pc)470def get_pc(): #mplab471 pc = _get_pc()472 log.info("Debug: get_pc PC=0x%08x" % pc)473 return pc474def run_target():#mplab475 log.info("Debug: run target")476 _run_target()477_stealth_runstate = 2478def halt_target(): #mplab479 global _stealth_runstate 480 log.info("Debug: halt target")481 _stealth_runstate = 2 # cancels stealth mode482 _halt_target()483def step_target(): #mplab484 log.info("Debug: stepping at pc 0x%08x" % get_pc())485 _step_target()486def reset_target(): #mplab487 log.info("Debug: reset")488 _reset_target()489 on_after_reset() # call autoload hook490def is_target_running():#mplab491 global _stealth_runstate492 if _stealth_runstate == 2:493 return _is_target_running()494 return _stealth_runstate != 0495def on_after_reset(): 496 if not settings.getBool("arm.use_vtor", False):497 return498 vtor_name = settings.getString("arm.vtor_adr", "0")499 vtor = -1500 try:501 vtor = int(vtor_name,0)502 except:503 try:504 vtor=deb.GetSymbolAddress(vtor_name)505 except:506 log.error("Debug: failed to compute location of VTOR")507 return508 load_vtor(vtor) 509 pass510def load_vtor(adr):511 try:512 pc = dev.Read32(adr + 4)513 sp = dev.Read32(adr)514 set_pc(arm.PC,pc)515 dev.WriteReg64(arm.SP,sp)516 log.info("Setting pc=%08x and sp=%08x" % (pc, sp))517 except:518 log.error("Debug: failed to set PC and SP to contents of exception_table")519def on_program_done():520 on_after_reset()521def end_debug_session(): #mplab522 log.info("Debug: End debug session")523 _end_debug_session()524def verify_transfer(type_of_mem, address, data, length): #mplab525 log.error("Not-implemented Verifying %08x bytes to address 0x%0x of %s memory" % (length, address, type_of_mem))526 return True527def blank_check(): #mplab528 log.info("Blank check")529def hold_in_reset(): #mplab530 log.info("Hold in reset")531 _hold_in_reset()532def release_from_reset(): #mplab533 log.info("Release from reset")534 _release_from_reset()...
j-link_cortex-m0plus.py
Source:j-link_cortex-m0plus.py
...37 dev.WriteReg64(arm.PC, pc)38def reset_target(): # mplab39 log.info("Debug: reset")40 dev.Reset()41 on_after_reset() # call autoload hook42g_stopped = False43def is_target_running(): # mplab44 global g_stopped45 stopped = dev.IsHalted()46 if stopped != g_stopped:47 log.info("Debug: target has halted" if stopped else "Debug: target is now running")48 g_stopped = stopped49 return 0 == g_stopped50def end_debug_session(): # mplab51 log.info("Debug: End debug session")52def on_after_reset(): # hook to be overwritten in autoload.py53 try:54 vtor=deb.GetSymbolAddress("exception_table")55 load_vtor(vtor) 56 except:57 pass 58 pass59def load_vtor(adr):60 try:61 dev.WriteReg64(arm.PC,dev.Read32(adr + 4))62 dev.WriteReg64(arm.SP,dev.Read32(adr))63 except:64 log.error("Debug: failed to set PC and SP to contents of exception_table")65def on_program_done():66 on_after_reset()67def write_config(address, len, data):68 dev.Write(address,data,0,len)69def read_config(address, length, data):70 dev.Read(address, data, 0, length)71def erase(): # mplab72 # looks like dev erases as it goes. No need for a whole chip erase73 log.info("Prog: Erase")74 dev.Halt()75 dev.api.JLINK_EraseChip()76 dev.Delay(100000)77def prog_write(type_of_mem, address, length, data): # mplab78 log.info("Writing %d bytes to address 0x%0x of %s memory" % (length, address, type_of_mem))79 if str(type_of_mem) == "Cfg":80 write_config(address, length, data)...
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